1. Field of the Invention
The present invention relates to a plasma display panel (hereafter called PDP) technology, more specifically, to a plasma display panel and a method of driving the plasma display panel to improve the brightness thereof using volume discharge effect.
2. Description of the Prior Art
The PDP is a display device employing charges accumulated by electrode discharge. Due to a variety of advantages, such as large scale, high capacity and full-color capability, the PDP has become one of the most popular flat panels in various applications.
FIG. 1 is a cross-section of the display cell of a conventional triple-electrode PDP. As shown in FIG. 1, the PDP has two glass substrates 1 and 7. Inert gas, such as Ne and Xe, is filled in a cavity between the glass substrates 1 and 7. Two types of electrodes, including sustain electrode X and scan electrodes Yi, are formed on the glass substrate 1 and parallel to each other. In addition, the sustain electrode X and scan electrodes Yi are coated with a dielectric layer 3 and a protective film 5. Address electrodes Ai are formed on the glass substrate 7 and located perpendicular to the sustain electrode X and scan electrodes Yi. Display cells of the PDP are isolated from each other by ribs 8. There are fluorescent materials 9 between these ribs 8 for illuminating in the discharge process. The fluorescent material 9 and the address electrodes Ai are separated by a dielectric layer 4.
FIG. 2 is a top view of the display cell of the conventional PDP. As shown in the figure, the sustain electrode X and the scan electrodes Yi are formed by transparent electrodes and located in parallel on one substrate. Address electrodes Ai are formed on the other substrate, perpendicular to the sustain electrode X and the scan electrodes Yi. The region surrounded by the ribs 8 constitutes a display cell 10.
FIG. 3 is a block diagram of a PDP monitor employing the conventional PDP. As shown in FIG. 3, the PDP 100 is driven by the scan electrodes Y1-Yn and sustain electrode X parallel to each other and the address electrodes A1-Am perpendicular to the electrodes Y1-Yn and X. As well as the PDP, the PDP monitor also includes a control circuit 110, an Y scan driver 112, an X common driver 114 and an address driver 116. The control circuit 110, using clock signal CLOCK, video data signal DATA, vertical synchronizing clock VSYNC and horizontal synchronizing clock HSYNC, produces display data and scan timing information for the generation of the driving signals in the above-mentioned drivers.
FIG. 4 is a timing diagram of the display of a frame on the PDP using the conventional driving scheme. Each frame is divided into several sub-frames. For example, in FIG. 3, each frame is divided into eight sub-frames SF1-SF8. Each sub-frame is used to process a certain gray level in a gray scale for all scanning lines. In a case of the gray scale with 256 gray levels, which corresponds to 8 bits, eight sub-frames are required. In addition, each sub-frame constitutes three operational periods, including reset periods RS1-RS8, address periods AR1-AR8 and sustain periods SS1-SS8.
The reset periods RS1-RS8 clear the residual charges of the last sub-frame. The address periods AR1-AR8 accumulate wall charges on some of the display cells using addressing discharge. More specifically, the scan electrodes Yi are sequentially scanned and address pulses which contain display data are sent to the address electrodes Ai. Thus, the wall charges can be formed on the addressed display cells through the discharge between scan electrodes Yi and address electrodes Ai. The sustain periods SS1-SS8 alternately send sustain pulses to the scanning electrodes Yi and the sustain electrode X. Only the display cells that have had the wall charges generated by addressing discharge in the address periods can be continuously illuminated in the sustain periods.
FIG. 5 is a waveform diagram illustrating the driving signals on the sustain electrode X and scan electrodes Yi of the PDP in a sustain period. As shown in FIG. 5, the X common driver 114 and the Y scan driver 112 alternately send the sustain pulses to the sustain electrode X and the scan electrodes Yi, respectively. If the voltage of the sustain pulses is set to be Vs and the address electrodes Ai are maintained at a constant voltage Vd by means of the electric field between the sustain electrode X and the scan electrode Yi, the display cells that have been written by the data in the address period can continuously illuminate. It is noted that the sustain voltage Vs should be lower than the firing voltage between the sustain electrode X and the scan electrodes Yi, preventing the loss of memory due to unwanted discharge.
The display brightness of the PDP is basically determined by the duration of the sustain periods and the average illumination during the sustain periods. The objective of the present invention is to provide a method of driving the PDP to improve the display brightness and luminescent efficiency of the PDP using the volume discharge effect, upgrading the display performance of the PDP. Conventional proposals for improving the display brightness and luminescent efficiency using the volume discharge effect usually adopt complicated driving schemes, not easily implemented.